A multi-core processor is a single computing component with two or more independent actual central processing units (called “cores”), which are the units that read and execute program instructions. Multi-core processors are used across many application domains including general-purpose, embedded, network, digital signal processing (DSP), and graphics. The improvement in performance gained by the use of a multi-core processor depends very much on the software algorithms used and their implementation. In particular, possible gains are limited by the fraction of the software that can be run in parallel simultaneously on multiple cores.
In multi-core network processing, a key challenge is how to exploit all the cores in these devices to achieve maximum networking performance, despite the performance limitations inherent in a symmetric multiprocessing operating system. In the current multi-core network processor architecture, the processing of a data packet is done by one or more core processors. The synchronization between various core processors and various threads of core processors, memory management, etc. are achieved through software programming. Further, when the processing of the data packet passes from one core to another core, the state or synchronization information is passed between the cores or between the threads of the core processing the data packet.
Significant resources are consumed in passing the state/synchronization information between the threads or the processors which reduces the availability of the resources for performing actual network application related tasks. Therefore, the overhead of passing the state/synchronization information decreases the efficiency of the processor.
Further, in current architecture, the core processor does not perform any useful network related operation while waiting for the arrival of the next data packet. The core processor may be idle until the next data packet arrives at the core processor. In current systems that have multi-core processors with an array of pipelined special purpose cores, the multi-core processor is limited by the capabilities of the special cores and pipeline depth. The multi-core is also limited by the slowest core.